Title
Design Techniques For Wideband Single-Bit Continuous-Time Delta Sigma Modulators With Fir Feedback Dacs
Abstract
We give design considerations for single-bit continuous-time Delta-Sigma modulators (CTDSMs) with FIR feedback DACs. These modulators have the low jitter sensitivity and high linearity properties characteristic of a multibit modulator, while using a simple one-bit quantizer, thereby combining the advantages of single-bit and multibit operation. We propose a method to compensate the loop for the delay introduced by the FIR-DAC. The efficacy of our architectural and circuit techniques is borne out by measurement results from a modulator that achieves about 71-dB SNDR in a 36-MHz bandwidth while consuming only 15 mW from a 1.2-V supply. Implemented in a 90-nm CMOS process and sampling at 3.6 GS/s, the CTDSM has a figure of merit (FoM) of 72.7 fJ/lvl, while occupying 0.12 mm(2).
Year
DOI
Venue
2012
10.1109/JSSC.2012.2217871
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Keywords
Field
DocType
Analog-to-digital conversion, continuous-time, oversampling, quantization, sigma-delta
Wideband,Oversampling,Computer science,Control theory,Delta-sigma modulation,Figure of merit,CMOS,Electronic engineering,Bandwidth (signal processing),Jitter,Finite impulse response
Journal
Volume
Issue
ISSN
47
12
0018-9200
Citations 
PageRank 
References 
23
2.37
4
Authors
2
Name
Order
Citations
PageRank
pradeep shettigar1303.90
Shanthi Pavan239187.81