Paper Info
Title
A 20-GS/s 5-b SiGe ADC for 40-Gb/s Coherent Optical Links
Abstract
A 10-GBd 40-Gb/s coherent optical transport is a promising technology for higher data rate communications by virtue of improved sensitivity and high spectrum efficiency. One of the major challenges in designing a 40-Gb/s coherent quadrature-phase-shift-keying receiver is to achieve high-speed data conversion at around 20-GHz sampling rate with at least 5-bit resolution. With the detailed design framework for the target requirements, this paper presents a 5-bit 20-GS/s flash analog-to-digital converter (ADC) realized in 0.18-m SiGe BiCMOS technology. The ADC includes a track-and-hold amplifier (THA) incorporated with linear distortion compensation, double-interpolation preamplifier, current bias-weighted comparator, and high-speed encoder logic. At 4 V, the THA had a bandwidth that exceeded 23 GHz and an IIP3 of 24 dBm. The ADC achieves a signal-to-noise-plus-distortion ratio of 28.6 dB and a spurious-free dynamic range of 36 dB with a 1-GHz input sinusoid sampled at 20 GS/s. The ADC has a wide resolution bandwidth of 7 GHz, and the figure of merit is 9.54 pJ/conversion-step. The ADC consumes 3.24 W from 4- and 3-V supplies when sampled at 20 GHz. The prototype ADC occupies 8.68 mm2 of silicon area.
Year
DOI
Venue
2010
10.1109/TCSI.2010.2048678
IEEE Trans. on Circuits and Systems
Keywords
Field
DocType
flash analog-to-digital converter,sige bicmos,track-and-hold amplifier,20-ghz sampling rate,signal-to-noise-plus-distortion ratio,high-speed data conversion,coherent optical link,coherent quadrature-phase-shift-keying receiver,analogue-digital conversion,sige,coherent optical links,prototype adc,adc consumes,bicmos analogue integrated circuits,voltage 4 v,double-interpolation preamplifier,high-speed encoder logic,linear distortion compensation,bicmos technology,5-bit 20-gs,frequency 20 ghz,voltage 3 v,track-and-hold amplifier (tha),quadrature phase shift keying,optical receivers,analog-to-digital converter (adc),10-gbd 40-gb,linearity compensation scheme,resolution bandwidth,5-bit resolution,current bias-weighted comparator,coherent optical receiver,bandwidth 7 ghz,ge-si alloys,bit rate 40 gbit/s,coherent optical transport,power 3.24 w,5-b sige adc,bandwidth,feedforward neural networks,figure of merit,gain,spurious free dynamic range,noise,spectrum
Comparator,Preamplifier,Sampling (signal processing),Electronic engineering,Figure of merit,Effective number of bits,Bandwidth (signal processing),Spectral efficiency,Electrical engineering,Mathematics,Amplifier
Journal
Volume
Issue
ISSN
57
10
1549-8328
Citations 
PageRank 
References 
3
0.76
4
Authors
3
Name
Order
Citations
PageRank
Jaesik Lee13712.61
Joseph Weiner2103.04
Young-Kai Chen37016.40