Paper Info
Title
Dual Algorithms for Vectorless Power Grid Verification Under Linear Current Constraints
Abstract
Vectorless power grid verification makes it possible to evaluate worst-case voltage noises without enumerating possible current waveforms. Under linear current constraints, the vectorless power grid verification problem can be formulated and solved as a linear programming (LP) problem. However, previous approaches suffer from long runtime due to the large problem size. In this paper, we design two dual algorithms that efficiently evaluate voltage noises in a resistor/capacitor power grid. Our algorithms combine novel dual approaches to solve the LP problem, and a preconditioned conjugate gradient power grid analyzer. The first algorithm exploits the structure of the problem to simplify its dual problem into a convex problem, which is then solved by the cutting-plane method. The second algorithm formulates a reduced-size LP problem for each node to compute upper bound of voltage noise. Experimental results show that both algorithms are highly efficient.
Year
DOI
Venue
2011
10.1109/TCAD.2011.2158433
IEEE Trans. on CAD of Integrated Circuits and Systems
Keywords
DocType
Volume
dual algorithms,conjugate gradient power grid analyzer,convex problem,linear programming,large problem size,Linear programming,resistor/capacitor power grid,lp problem,vectorless verification,voltage noise,grid analyzer,dual problem,power integrated circuits,preconditioned conjugate gradient power,reduced-size lp problem,linear programming problem,capacitor power grid,vectorless power grid verification,power grid,linear current constraints
Journal
30
Issue
ISSN
Citations 
10
0278-0070
8
PageRank 
References 
Authors
0.49
14
2
Name
Order
Citations
PageRank
Xuanxing Xiong1845.90
Jia Wang2213.19