Abstract | ||
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In spite of the popularly of Java, its slow performance and unpredictable execution characteristics are still some of the most challenging issues faced by designers for real-time applications. In the past, numerous architectural enhancements have been investigated to enhance performance and increase predictability. In this paper, dedicated hardware based enhancements that can complement existing design solutions are presented. To achieve high-performance while maintaining simplicity of design, a nested state controller is used for modelling Java instructions. This approach enables ahead of synthesis resource sharing and simplified reuse of functional elements. A hardware based automatic memory management sub-system is also presented that provides virtual pointer based memory access for memory allocations. Along with fixed cycle allocation and fast automatic resizing of memory, the memory controller provides predictable management functions. The paper describes a simple system targeted to the Virtex II Pro FPGA. |
Year | Venue | Keywords |
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2005 | ESA '05: PROCEEDINGS OF THE 2005 INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS AND APPLICATIONS | Java Virtual Machine,real-time Java,memory management,nested state machines |
Field | DocType | Citations |
Virtual machine,Java annotation,Computer science,Java concurrency,Real time Java,strictfp,Java Card,Java applet,Java,Operating system | Conference | 1 |
PageRank | References | Authors |
0.48 | 1 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Aniruddha Desai | 1 | 21 | 3.35 |
Gregory Cain | 2 | 1 | 0.48 |
Jugdutt Singh | 3 | 38 | 10.73 |
Ronny Veljanovski | 4 | 3 | 1.65 |