Name
Abstract | ||
|---|---|---|
Real-time scheduling on processors that support dynamic voltage and frequency scaling is analyzed. The Slacked Earliest Deadling First (SEDF) algorithm is proposed and it is shown that the algorithm is optimal in minimizing processor energy consumption and maximum lateness. An upper bound on the processor energy savings is also derived. Real-time scheduling of periodic tasks is also analyzed and optimal voltage and frequency allocation for a given task set is determined that guarantees schedulability and minimizes energy consumption. |
Year | Venue | Keywords |
|---|---|---|
2001 | ICCAD | frequency scaling,slacked earliest deadling first,minimizes energy consumption,real-time scheduling,frequency allocation,optimal voltage,dynamic voltage,processor energy saving,energy efficient real-time scheduling,guarantees schedulability,processor energy consumption,upper bound,geometric programming,energy efficient,design of experiments |
Field | DocType | ISBN |
Mathematical optimization,Fair-share scheduling,Upper and lower bounds,Computer science,Scheduling (computing),Efficient energy use,Real-time computing,Frequency scaling,Frequency allocation,Dynamic priority scheduling,Energy consumption | Conference | 0-7803-7249-2 |
Citations | PageRank | References |
27 | 2.74 | 10 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Amit Sinha | 1 | 336 | 48.26 |
| Anantha P. Chandrakasan | 2 | 14442 | 1946.93 |