Name
Abstract | ||
|---|---|---|
Reducing the traffic between CPU and main memory is one of the main issues in the optimization of programs for load/store
architectures. It is the register allocation module of optimizing compliers that keeps this traffic low by cleverly associating
the program variables to the CPU registers. Since register allocation takes place during code generation and works on the
intermediate code produced by the compiler front-end, the structure of such a code, which closely depends on the structure
of the source code, heavily affects the effectiveness of register allocation. Proper techniques can be used to restructure
the source programs in such a way to produce intermediate code able to take advantage of advanced register allocation schemes.
In this paper we analyze one of these techniques called unroll-and-jam. In particular we find the fractional optimal unroll-and-jam transformation valid for a large class of computing intensive
programs. The paper presents the analytical model of the optimal unroll-and-jam and a method to compute the unrolling parameters
numerically.
|
Year | DOI | Venue |
|---|---|---|
1999 | 10.1007/BFb0100624 | HPCN Europe |
Keywords | Field | DocType |
register utilization,load/store architectures,optimal unroll-and-jam,unroll-and- jam.,register allocation,code generation,source code,front end | Central processing unit,Register allocation,Source code,Computer science,Parallel computing,Compiler,Code generation,Systems architecture,Processor register,Code (cryptography),Distributed computing | Conference |
Volume | ISSN | ISBN |
1593 | 0302-9743 | 3-540-65821-1 |
Citations | PageRank | References |
1 | 0.36 | 4 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| N. Zingirian | 1 | 64 | 9.17 |
| Massimo Maresca | 2 | 281 | 47.43 |