Abstract | ||
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The application of integrated circuit technology to Speech Synthesis and Recognition represents an important development in the field. This paper describes a complete Speech Synthesis System on a single chip. The considerations involved in the choice of a compatible algorithm, machine word length and coefficient accuracy are discussed. The device contains a 32 word vocabulary and an innovative implementation of the LPC lattice structure. It operates at a variable bit rate to provide high quality speech with low bit storage requirements. The software supporting the Speech Synthesis System is also described. |
Year | DOI | Venue |
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1981 | 10.1109/ICASSP.1981.1171269 | Acoustics, Speech, and Signal Processing, IEEE International Conference ICASSP '81. |
Keywords | Field | DocType |
speech processing,linear predictive coding,chip,speech synthesis,variable bit rate,integrated circuit | Speech processing,Speech synthesis,Speech coding,Voice activity detection,Computer science,Algorithm,Speech recognition,Software,Codec2,Vocabulary,Linear predictive coding | Conference |
Volume | Citations | PageRank |
6 | 0 | 0.34 |
References | Authors | |
1 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Gideon Amir | 1 | 0 | 0.34 |
Gregorian, R. | 2 | 0 | 0.34 |
Gwyn Edwards | 3 | 0 | 0.34 |