Title
A novel pixel topology for on-the-fly programmable image processing
Abstract
A novel pixel topology for real-time programmable image processing is presented. The circuit can implement a large class of spatio-temporal filters over a 3times3 pixels kernel. The image processing is based on two fundamental operations: absolute value of a difference and signal accumulation of partial results. On-the-fly processing approach is used to perform image filtering over high dynamic-range images. The pixel, designed in a CMOS 0.35 mum technology, has square shape with a side of 32.5 mum, consists of 30 transistors and presents a fill factor of 24%.
Year
DOI
Venue
2005
10.1109/ICECS.2005.4633395
Gammarth
Keywords
Field
DocType
CMOS integrated circuits,filtering theory,image processing,CMOS technology,high dynamic-range images,image filtering,on-the-fly programmable image processing,pixel topology,signal accumulation,size 0.35 mum,spatio-temporal filters
Feature detection (computer vision),Non-local means,Computer science,Image processing,Electronic engineering,Artificial intelligence,Computer hardware,Computer vision,Topology,Filter (signal processing),CMOS,Pixel,Digital image processing,Pixel connectivity
Conference
ISBN
Citations 
PageRank 
978-9972-61-100-1
0
0.34
References 
Authors
1
3
Name
Order
Citations
PageRank
Nicola Massari100.34
Massimo Gottardi200.34
Andrea Simoni300.34