Paper Info
Title
Improved 64-bit Radix-16 Booth Multiplier Based on Partial Product Array Height Reduction.
Abstract
In this paper, we describe an optimization for binary radix-16 (modified) Booth recoded multipliers to reduce the maximum height of the partial product columns to [n/4] for n = 64-bit unsigned operands. This is in contrast to the conventional maximum height of [(n + 1)/4]. Therefore, a reduction of one unit in the maximum height is achieved. This reduction may add flexibility during the design of ...
Year
DOI
Venue
2017
10.1109/TCSI.2016.2561518
IEEE Transactions on Circuits and Systems I: Regular Papers
Keywords
Field
DocType
Optimization,Adders,Delays,Microprocessors,Pipeline processing,Vegetation,Multiplexing
Partial product,Operand,Arithmetic,Algorithm,Radix,Electronic engineering,Multiplier (economics),Mathematics,Binary number,Booth's multiplication algorithm
Journal
Volume
Issue
ISSN
64
2
1549-8328
Citations 
PageRank 
References 
3
0.57
11
Authors
3
Name
Order
Citations
PageRank
Elisardo Antelo126225.04
Paolo Montuschi233640.25
Alberto Nannarelli319020.41