Name
Abstract | ||
|---|---|---|
We present an automated framework for the validation of memory controllers (MCs) called MCXplore. In developing this framework, we construct formal models for memory requests and command interactions. MCXplore enables validation engineers to define their test plans precisely using temporal logic specifications. We use the NuSMV model-checker to generate counterexamples that serve as test templates... |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/TCAD.2017.2705123 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Keywords | Field | DocType |
Random access memory,Space exploration,Model checking,Computational modeling,Delays,Benchmark testing | Control theory,Test plan,Model checking,Computer science,Correctness,Regression testing,Real-time computing,Temporal logic,Memory controller,Benchmark (computing) | Journal |
Volume | Issue | ISSN |
37 | 5 | 0278-0070 |
Citations | PageRank | References |
5 | 0.41 | 15 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mohamed Hassan | 1 | 60 | 5.22 |
| Hiren D. Patel | 2 | 354 | 31.39 |