Title
SafeNVM: A Non-Volatile Memory Store with Thread-Level Page Protection
Abstract
For many big data applications, non-volatile memory (NVM) can be utilized to store and process the data at faster rate due to its high-performance, scalable technology, DRAM-like interface and low energy requirement. NVMs such as phase change memory and memristor allow the applications to store persistent data directly in memory, and avoid data serialization and deserialization. However, NVM, like volatile memory, is susceptible to data corruption from software bugs. In this work, we present a paradigm shift from current process-based page-protection to a thread-based solution specifically designed for NVM. We have developed SafeNVM, a reliable NVM store to support application-specific data formats. SafeNVM will enable the NVM to provide strong data protection while delivering high performance access. We propose a simple hardware change in TLB and page table entry and exploit bound checking inherent to swizzled pointers. We show that SafeNVM is reliable against a collection of stray writes and the cost to achieve such protection is small.
Year
DOI
Venue
2017
10.1109/BigDataCongress.2017.18
2017 IEEE International Congress on Big Data (BigData Congress)
Keywords
Field
DocType
Big Data,NVM,Data Reliability
Interleaved memory,Semiconductor memory,Non-volatile random-access memory,Computer science,NVM Express,Memory management,Page fault,Memory map,Volatile memory,Operating system
Conference
ISSN
ISBN
Citations 
2379-7703
978-1-5386-1997-1
0
PageRank 
References 
Authors
0.34
19
2
Name
Order
Citations
PageRank
Pradeep Kumar1312.33
H. Howie Huang253740.29