Paper Info
Title
A Security Architecture For Risc-V Based Iot Devices
Abstract
New IoT applications are demanding for more and more performance in embedded devices while their deployment and operation poses strict power constraints. We present the security concept for a customizable Internet of Things (IoT) platform based on the RISC-V ISA and developed by several Fraunhofer Institutes. It integrates a range of peripherals with a scalable computing subsystem as a three dimensional System-in-Package (3D-SiP).The security features aim for a medium security level and target the requirements of the IoT market. Our security architecture extends given implementations to enable secure deployment, operation, and update. Core security features are secure boot, an authenticated watchdog timer, and key management.The Universal Sensor Platform (USeP) SoC is developed for GLOBALFOUNDRIES' 22FDX technology and aims to provide a platform for Small and Medium-sized Enterprises (SMEs) that typically do not have access to advanced microelectronics and integration know-how, and are therefore limited to Commercial Off-The-Shelf (COTS) products.
Year
DOI
Venue
2019
10.23919/DATE.2019.8714822
2019 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)
Keywords
Field
DocType
RISC-V, device security, secure boot, watchdog timer, IoT
RISC-V,Computer architecture,Computer science,Parallel computing,Internet of Things,Enterprise information security architecture
Conference
ISSN
Citations 
PageRank 
1530-1591
0
0.34
References 
Authors
0
3
Name
Order
Citations
PageRank
Lukas Auer100.34
Christian Skubich200.34
Matthias Hiller312912.60