Title
GigaNoC - A Hierarchical Network-on-Chip for Scalable Chip-Multiprocessors
Abstract
Electrical engineers have learned how to build amazingly complex systems by assembling transistors, wires, and passive components into intricate networks. While solidly founded in semiconductor physics, pure engineering has made possible the design of ...
Year
DOI
Venue
2007
10.1109/DSD.2007.66
DSD
Keywords
Field
DocType
chip,network on chip,technological progress,field programmable gate arrays,network routing,community structure,fpga,complex system,communication protocol
Computer science,Parallel computing,Field-programmable gate array,Network on a chip,Real-time computing,Chip,Bandwidth (signal processing),Standard cell,Scalability,Embedded system,Communications protocol,Debugging
Conference
ISBN
Citations 
PageRank 
0-7695-2978-X
13
0.82
References 
Authors
8
4
Name
Order
Citations
PageRank
Christoph Puttmann1363.90
Jorg Christian Niemann2636.65
Mario Porrmann342050.91
U. Rückert4755103.61