Name
Abstract | ||
|---|---|---|
Due to continuous advancements in modem technology processes which have resulted in integrated circuits with smaller feature sizes and higher complexity, current system-on-chip designs consist of many different components such as memories, interfaces and microprocessors. To handle this growing number of components, an efficient communication structure must be provided and incorporated during system design. This work deals with the implementation of an efficient communication structure for an on-chip multiprocessor design. The internal structure of one node is proposed and specified by its requirements. Furthermore, different routing strategies are implemented. Moreover, the communication structure is mapped on a standard cell process to examine the achieved processing speed and to determine the area requirements. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1007/11523277_20 | International Federation for Information Processing |
Keywords | Field | DocType |
switch box,networks-on-chip,system-on-chip,multiprocessor architectures | Switch box,System on a chip,Computer science,Systems design,Multiprocessing,Standard cell,Integrated circuit,Embedded system | Conference |
Volume | ISSN | Citations |
184 | 1571-5736 | 2 |
PageRank | References | Authors |
0.46 | 4 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ralf Eickhoff | 1 | 65 | 12.37 |
| Jorg Christian Niemann | 2 | 63 | 6.65 |
| Mario Porrmann | 3 | 420 | 50.91 |
| U. Rückert | 4 | 755 | 103.61 |