Paper Info
Title
A bias-scalable current-mode analog support vector machine based on margin propagation
Abstract
Bias-scalability in analog CMOS circuits refers to a current-mode design paradigm where the operation of the circuit remains invariant to the operating conditions (weak-inversion, moderate-inversion or strong-inversion) of the transistors. In this paper we present the design and implementation of a bias-scalable analog support vector machine (SVM) based on our previously reported margin propagation (MP) technique. All the computation in the proposed SVM occur in the logarithmic domain and requires only the use of addition, subtraction and threshold operation which can be implemented using KCL and diodes. The SVM parameters are stored on an array of temperature compensated floating-gate current memories and the training of the SVM is achieved using an offline procedure. Measured results from a SVM prototyped in a 0.5μm CMOS process validates the bias-scalability across different MOSFET operating regimes.
Year
DOI
Venue
2014
10.1109/ISCAS.2014.6865118
ISCAS
Keywords
Field
DocType
cmos analogue integrated circuits,margin propagation technique,current-mode design paradigm,analog cmos circuits,size 0.5 mum,threshold operation,logarithmic domain,mp technique,mosfet operating regimes,integrated circuit design,subtraction operation,kcl,bias-scalable current-mode analog support vector machine,temperature compensated floating-gate current memory arrays,diodes,transistors,current-mode circuits,svm parameters,support vector machines,kernel
Computer science,Support vector machine,CMOS,Electronic engineering,Logarithm,MOSFET,Transistor,Electronic circuit,Scalability,Computation
Conference
ISSN
Citations 
PageRank 
0271-4302
0
0.34
References 
Authors
0
2
Name
Order
Citations
PageRank
Ming Gu155474.82
Shantanu Chakrabartty233564.30