Name
Abstract | ||
|---|---|---|
FPGAs' logic is diagnosed to detect failures, finding a place of its occurrence, and determining its type. Diagnostic sequences are often used for diagnostics. They include several input sets. It is determined which failure occurred, according to the model of failures and the results of the function on the input sets. IEEE standards require systems on a chip (SoC) and FPGAs to contain built-in diagnostics. It is advisable to use genetic algorithms for this purpose. However, there is a problem of limited memory of the built-in diagnostic microcontroller that implements GA. This article describes the construction of a diagnostic sequence using a genetic algorithm with intermediate coding of individuals. Estimates of the efficiency of the algorithm are given, as well as estimates of the required memory for its execution. The simulation of the GA execution on an embedded microcontroller with limited memory has been carried out. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/IDT52577.2021.9497584 | 2021 International Conference on Information and Digital Technologies (IDT) |
Keywords | DocType | ISSN |
FPGA,single stuck-at failures,genetic algorithm,diagnosing,microcontroller,built-in diagnostics | Conference | 2575-6753 |
ISBN | Citations | PageRank |
978-1-6654-3693-9 | 0 | 0.34 |
References | Authors | |
0 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ekaterina Y. Danilova | 1 | 0 | 0.34 |
| Dmitry A. Kovylyaev | 2 | 0 | 0.34 |
| Alexey Y. Gorodilov | 3 | 0 | 0.34 |