Paper Info
Title
Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform
Abstract
In this contribution, the potential of parallelized software that implements algorithms of digital signal processing on a multicore processor platform is analyzed. For this purpose various digital signal processing tasks have been implemented on a prototyping platform i.e. an ARM MPCore featuring four ARM11 processor cores. In order to analyze the effect of parallelization on the resulting performance-power ratio, influencing parameters like e.g. the number of issued program threads have been studied. For parallelization issues the OpenMP programming model has been used which can be efficiently applied on C-level. In order to elaborate power efficient code also a functional and instruction level power model of the MPCore has been derived which features a high estimation accuracy. Using this power model and exploiting the capabilities of OpenMP a variety of exemplary tasks could be efficiently parallelized. The general efficiency potential of parallelization for multiprocessor architectures can be assembled.
Year
DOI
Venue
2007
10.1109/ICSAMOS.2007.4285736
IC-SAMOS: 2007 INTERNATIONAL CONFERENCE ON EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING AND SIMULATION, PROCEEDINGS
Keywords
Field
DocType
multicore processors,parallelization,power estimation and optimization
Digital signal processing,Programming paradigm,Computer science,Parallel computing,Software prototyping,Thread (computing),Multiprocessing,Software,Multi-core processor,Message passing
Conference
Citations 
PageRank 
References 
4
0.43
2
Authors
6
Name
Order
Citations
PageRank
Holger Blume122042.84
Jörg Von Livonius2121.93
Lisa Rotenberg340.43
Tobias G. Noll419937.51
Harald Bothe5121.25
Jörg Brakensiek6898.94