Name
Year | DOI | Keywords |
|---|---|---|
2010 | 10.1109/ISSOC.2010.5625549 | adders,hardware accelerator,network routing,routing,system on a chip,vlsi,layout,signal processing,field programmable gate array,resource management,computer architecture,system on chip,field programmable gate arrays |
DocType | Citations | PageRank |
Conference | 1 | 0.37 |
References | Authors | |
4 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Thomas Coenen | 1 | 5 | 1.12 |
| Jochen Schleifer | 2 | 5 | 1.12 |
| Oliver Weiss | 3 | 1 | 0.70 |
| Tobias G. Noll | 4 | 199 | 37.51 |