Title | ||
---|---|---|
A Family of Modular QRD-Accelerator Architectures and Circuits Cross-Layer Optimized for High Area- and Energy-Efficiency |
Abstract | ||
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QR-decomposition accelerators are attractive SoC components for many applications with a wide range of specifications. A new family of highly area- and energy-efficient, modular two-way linear-array QRD architectures based on the Givens algorithm and CORDIC rotations is proposed. The template architecture allows for implementations of real-/complex-valued and integer/floating-point QRDs. An accurate algebraic cost model enables cross-layer optimization over architecture, micro-architecture and circuit level using a rich set of parameters. Quantitative results for exemplary applications are presented for implementations in 40-nm CMOS, proving the significant improvement of efficiency. |
Year | DOI | Venue |
---|---|---|
2016 | 10.1007/s11265-015-0976-6 | Journal of Signal Processing Systems |
Keywords | Field | DocType |
QR-decomposition,Matrix decomposition,QRD accelerators,Design space exploration,Cross-layer optimization,Early cost estimation | Cross-layer optimization,Computer science,Efficient energy use,Parallel computing,CMOS,Real-time computing,CORDIC,Modular design,Electronic circuit,Design space exploration,QR decomposition | Journal |
Volume | Issue | ISSN |
83 | 3 | 1939-8018 |
Citations | PageRank | References |
1 | 0.36 | 15 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Upasna Vishnoi | 1 | 8 | 1.48 |
Michael Meixner | 2 | 7 | 2.57 |
Tobias G. Noll | 3 | 199 | 37.51 |