Title
Accurate Estimation of CMOS Power Consumption Considering Glitches by Using Waveform Lookup.
Abstract
Gate-level power estimation methodologies are often considered as a sign-off level reference for digital circuit design. Nevertheless, when gate delays and related effects like glitches are taken into account, commercial state-of-the-art gate-level power estimators show surprisingly large estimation errors. Following an analysis of factors causing these inaccuracies, a novel gate-level power estim...
Year
DOI
Venue
2017
10.1109/TCSII.2016.2642179
IEEE Transactions on Circuits and Systems II: Express Briefs
Keywords
Field
DocType
Logic gates,Estimation,Switches,Power demand,Integrated circuit modeling,Delays,Libraries
Glitch,Logic gate,Waveform,Electronic engineering,CMOS,Analog signal,Digital circuit design,Mathematics,Estimator,Power consumption
Journal
Volume
Issue
ISSN
64
7
1549-7747
Citations 
PageRank 
References 
0
0.34
7
Authors
2
Name
Order
Citations
PageRank
Michael Meixner172.57
Tobias G. Noll219937.51