Title
Classification of Resilience Techniques Against Functional Errors at Higher Abstraction Layers of Digital Systems.
Abstract
Nanoscale technology nodes bring reliability concerns back to the center stage of digital system design. A systematic classification of approaches that increase system resilience in the presence of functional hardware (HW)-induced errors is presented, dealing with higher system abstractions, such as the (micro)architecture, the mapping, and platform software (SW). The field is surveyed in a systematic way based on nonoverlapping categories, which add insight into the ongoing work by exposing similarities and differences. HW and SW solutions are discussed in a similar fashion so that interrelationships become apparent. The presented categories are illustrated by representative literature examples to illustrate their properties. Moreover, it is demonstrated how hybrid schemes can be decomposed into their primitive components.
Year
DOI
Venue
2017
10.1145/3092699
ACM Comput. Surv.
Keywords
Field
DocType
Resilience, fault tolerance, mitigation, reliability
Psychological resilience,Architecture,Abstraction,Computer science,Systems design,Theoretical computer science,Fault tolerance,Software,MPSoC
Journal
Volume
Issue
ISSN
50
4
0360-0300
Citations 
PageRank 
References 
3
0.39
84
Authors
7
Name
Order
Citations
PageRank
Georgia Psychou1182.36
Dimitrios Rodopoulos2569.74
Mohamed M. Sabry312110.19
Tobias Gemmeke4496.49
D. Atienza518224.26
Tobias G. Noll619937.51
Francky Catthoor73932423.30